128 lines
6.3 KiB
JSON
128 lines
6.3 KiB
JSON
{
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"dataType": "CVE_RECORD",
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"dataVersion": "5.2",
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"cveMetadata": {
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"cveId": "CVE-2026-12629",
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"assignerOrgId": "e2e69745-5e70-4e92-8431-deb5529a81ad",
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"state": "PUBLISHED",
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"assignerShortName": "zephyr",
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"dateReserved": "2026-06-18T15:22:24.098Z",
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"datePublished": "2026-08-17T16:18:50.322Z",
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"dateUpdated": "2026-11-04T04:59:32.201Z"
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},
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"containers": {
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"cna": {
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"providerMetadata": {
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"orgId": "e2e69745-5e70-4e92-8431-deb5529a81ad",
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"shortName": "zephyr",
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"dateUpdated": "2026-11-04T04:59:32.201Z"
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},
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"title": "PL011 UART error interrupts never cleared, enabling an external-peer interrupt-storm denial of service",
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"descriptions": [
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{
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"lang": "en",
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"value": "The ARM PL011 UART driver in drivers/serial/uart_pl011.c fails to acknowledge receive error interrupts. On the PL011, the framing, parity, break, and overrun error interrupts (PL011_IMSC_ERROR_MASK) are cleared only by writing the interrupt-clear register UARTICR; reading the data register clears the RX interrupt and the per-byte RSR status but not the error interrupt status in MIS. The interrupt service routine pl011_isr() acknowledged only the CTS modem-status interrupt and never wrote icr for the error bits, so an asserted error interrupt remains pending after the ISR returns.\n\nWhen an application enables error-interrupt reporting via the public uart_irq_err_enable() API, an attacker who controls the serial peer can deterministically assert these error bits by injecting line errors on the RX line — a baud/stop-bit mismatch or mid-character break (framing/break error), a flipped parity bit (parity error), or FIFO flooding (overrun error). Because the error interrupt is never cleared, the interrupt line stays asserted and the CPU re-enters pl011_isr() immediately and indefinitely, producing an interrupt-storm livelock from which the core makes no forward progress.\n\nThe impact is an availability-only denial of service (permanent hang), reachable from an external or removable UART peer. Exploitation is gated by configuration: the error interrupt is off by default and no in-tree subsystem enables it, so only applications that explicitly call uart_irq_err_enable() on a PL011-based, interrupt-driven port are affected. The fix makes pl011_isr() acknowledge the pending error bits via uart->icr, breaking the loop, and additionally clears the latched RSR status in pl011_err_check()."
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}
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],
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"affected": [
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{
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"vendor": "zephyrproject",
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"product": "zephyr",
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"collectionURL": "https://github.com/zephyrproject-rtos/zephyr",
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"packageName": "zephyr",
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"defaultStatus": "unaffected",
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"programFiles": [
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"drivers/serial/uart_pl011.c"
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],
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"versions": [
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{
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"version": "1.14.0",
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"status": "affected",
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"versionType": "semver",
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"lessThan": "4.3.2"
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},
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{
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"version": "4.4.0",
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"status": "affected",
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"versionType": "semver",
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"lessThan": "4.4.2"
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}
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]
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}
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],
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"references": [
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{
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"url": "https://github.com/zephyrproject-rtos/zephyr/commit/1069b6822ac90da2b9e6dc8a5bbe3873e9f92818",
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"name": "Fix commit",
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"tags": [
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"patch"
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]
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},
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{
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"url": "https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-36rp-2hcp-f5hv",
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"name": "GHSA-36rp-2hcp-f5hv"
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}
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],
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"metrics": [
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{
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"format": "CVSS",
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"cvssV3_1": {
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"version": "3.1",
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"vectorString": "CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:N/I:N/A:H",
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"baseScore": 4.6,
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"baseSeverity": "MEDIUM"
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}
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}
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],
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"problemTypes": [
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{
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"descriptions": [
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{
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"lang": "en",
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"description": "dos",
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"cweId": "CWE-835",
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"type": "CWE"
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}
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]
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}
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],
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"x_generator": {
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"engine": "cvelib 1.8.0"
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}
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},
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"adp": [
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{
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"metrics": [
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{
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"other": {
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"type": "ssvc",
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"content": {
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"timestamp": "2026-08-17T18:26:54.616442Z",
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"id": "CVE-2026-12629",
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"options": [
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{
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"Exploitation": "none"
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},
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{
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"Automatable": "no"
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},
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{
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"Technical Impact": "partial"
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}
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],
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"role": "CISA Coordinator",
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"version": "2.0.3"
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}
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}
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}
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],
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"title": "CISA ADP Vulnrichment",
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"providerMetadata": {
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"orgId": "134c704f-9b21-4f2e-91b3-4a467353bcc0",
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"shortName": "CISA-ADP",
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"dateUpdated": "2026-08-17T18:27:37.225Z"
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}
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}
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]
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}
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} |