256 lines
14 KiB
JSON
256 lines
14 KiB
JSON
{
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"dataType": "CVE_RECORD",
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"dataVersion": "5.2",
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"cveMetadata": {
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"cveId": "CVE-2023-53474",
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"assignerOrgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
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"state": "PUBLISHED",
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"assignerShortName": "Linux",
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"dateReserved": "2025-10-01T11:39:39.401Z",
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"datePublished": "2025-10-01T11:42:43.798Z",
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"dateUpdated": "2026-10-15T21:41:28.463Z"
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},
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"containers": {
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"cna": {
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"providerMetadata": {
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"orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
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"shortName": "Linux",
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"dateUpdated": "2026-08-05T09:14:15.723Z"
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},
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"descriptions": [
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{
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"lang": "en",
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"value": "In the Linux kernel, the following vulnerability has been resolved:\n\nx86/MCE/AMD: Use an u64 for bank_map\n\nThee maximum number of MCA banks is 64 (MAX_NR_BANKS), see\n\n a0bc32b3cacf (\"x86/mce: Increase maximum number of banks to 64\").\n\nHowever, the bank_map which contains a bitfield of which banks to\ninitialize is of type unsigned int and that overflows when those bit\nnumbers are >= 32, leading to UBSAN complaining correctly:\n\n UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/mce/amd.c:1365:38\n shift exponent 32 is too large for 32-bit type 'int'\n\nChange the bank_map to a u64 and use the proper BIT_ULL() macro when\nmodifying bits in there.\n\n [ bp: Rewrite commit message. ]"
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}
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],
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"metrics": [
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{
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"cvssV3_1": {
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"version": "3.1",
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"vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H",
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"baseScore": 7.8,
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"baseSeverity": "HIGH"
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},
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"scenarios": [
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{
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"lang": "en",
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"value": "AV:L - The affected code is x86 AMD machine-check bank initialization, reached only during local CPU identification and the CPU-hotplug online callback (`mce_cpu_online()`), plus the local threshold sysfs/LVT interrupt paths. There is no network-facing or adjacent-network path, and KVM caps guests at 32 MCA banks so the condition is not reachable from a guest.\nAC:L - On an affected system (AMD CPU whose MCG_CAP reports more than 32 MCA banks, as MAX_NR_BANKS=64 was raised to support), the out-of-range shift is hit deterministically on every CPU bring-up with no race, timing window, or memory-layout dependency. Consistent with the scoring of other hardware-model-specific arch/x86/kernel/cpu defects, the platform precondition is treated as the vulnerable configuration rather than as added complexity.\nPR:L - The buggy bitmap handling executes during boot with no privileges at all, and the misprogrammed threshold banks/MSR addresses it produces are subsequently exercised through the low-privilege local surface; re-triggering it deliberately via CPU offline/online needs only local access to the machine. A basic local user is the lowest-privileged actor on such a system, so PR:L rather than PR:H.\nUI:N - The defect is triggered automatically by kernel CPU initialization and the hotplug/thresholding paths; no victim has to open a file, mount anything, or take any other action.\nS:U - The corruption is confined to the kernel's own per-CPU MCE bookkeeping and MSR programming within the same security authority. No VM, IOMMU, or sandbox boundary is crossed — the KVM MCE bank limit of 32 rules out a guest-to-host angle.\nC:H - The aliased `smca_misc_banks_map` makes `smca_get_block_address()` hand back MISCy MSR addresses for banks that have no such registers, and `allocate_threshold_blocks()` recurses over and reads those out-of-range MCA register addresses, exposing hardware state that belongs to unrelated banks through the threshold block objects. Undefined shift behaviour additionally lets the compiler assume `bank < 32`, so the resulting indexing is not reliably bounded.\nI:H - `threshold_restart_bank()` performs an unguarded `wrmsr()` on the mis-derived `b->address`, so MCA threshold, LVT-offset and control registers of the wrong bank get overwritten, and the aliased `bank_map` enables/disables thresholding and deferred-error reporting for banks other than the intended ones. This is attacker-influenceable kernel-controlled machine state written to the wrong target.\nA:H - The same mis-derived address reaches the unguarded `rdmsr()`/`wrmsr()` in `threshold_restart_bank()`, where a non-existent MSR raises an unhandled `#GP` in kernel context and panics the machine, and with `CONFIG_UBSAN_TRAP=y` the shift-out-of-bounds itself traps during CPU bring-up. Beyond the crash, the corrupted `bank_map` breaks MCA thresholding for banks ≥32 so genuine uncorrectable hardware errors are misconfigured or unhandled."
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}
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]
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}
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],
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"affected": [
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{
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"product": "Linux",
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"vendor": "Linux",
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"defaultStatus": "unaffected",
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"repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
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"programFiles": [
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"arch/x86/kernel/cpu/mce/amd.c"
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],
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"versions": [
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{
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"version": "a0bc32b3cacf194dc479b342f006203fd1e1941a",
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"lessThan": "a9b9ea0e63a0ec5e97bf1219ab6dcbd55e362f83",
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"status": "affected",
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"versionType": "git"
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},
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{
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"version": "a0bc32b3cacf194dc479b342f006203fd1e1941a",
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"lessThan": "11c58a0c1937c157dbdf82d5ab634d68c99f3098",
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"status": "affected",
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"versionType": "git"
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"lessThan": "ba8ffb1251eb629c2ec35220e3896cf4f7b888a7",
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"status": "affected",
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{
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"lessThan": "9669fa17287c3af2bbd4868d4c8fdd9e57f8332e",
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"status": "affected",
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"versionType": "git"
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},
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{
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"version": "a0bc32b3cacf194dc479b342f006203fd1e1941a",
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"lessThan": "67bb7521b6420d81dab7538c0686f18f7d6d09f4",
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"status": "affected",
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"versionType": "git"
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},
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"version": "a0bc32b3cacf194dc479b342f006203fd1e1941a",
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"lessThan": "4c1cdec319b9aadb65737c3eb1f5cb74bd6aa156",
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"status": "affected",
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}
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]
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},
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{
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"product": "Linux",
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"vendor": "Linux",
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"defaultStatus": "affected",
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"repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
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"programFiles": [
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"arch/x86/kernel/cpu/mce/amd.c"
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],
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"versions": [
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{
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"version": "5.10",
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"status": "affected"
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},
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{
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"version": "0",
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"lessThan": "5.10",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "5.10.180",
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"lessThanOrEqual": "5.10.*",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "5.15.111",
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"lessThanOrEqual": "5.15.*",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "6.1.28",
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"lessThanOrEqual": "6.1.*",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "6.2.15",
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"lessThanOrEqual": "6.2.*",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "6.3.2",
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"lessThanOrEqual": "6.3.*",
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"status": "unaffected",
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"versionType": "semver"
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},
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{
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"version": "6.4",
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"lessThanOrEqual": "*",
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"status": "unaffected",
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"versionType": "original_commit_for_fix"
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}
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]
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}
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],
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"cpeApplicability": [
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{
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"nodes": [
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"operator": "OR",
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"negate": false,
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"vulnerable": true,
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"criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
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"versionStartIncluding": "5.10",
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"versionEndExcluding": "5.10.180"
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},
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"vulnerable": true,
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"criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
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"references": [
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{
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"url": "https://git.kernel.org/stable/c/a9b9ea0e63a0ec5e97bf1219ab6dcbd55e362f83"
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},
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{
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"url": "https://git.kernel.org/stable/c/11c58a0c1937c157dbdf82d5ab634d68c99f3098"
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},
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{
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"url": "https://git.kernel.org/stable/c/ba8ffb1251eb629c2ec35220e3896cf4f7b888a7"
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},
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{
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"url": "https://git.kernel.org/stable/c/9669fa17287c3af2bbd4868d4c8fdd9e57f8332e"
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{
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"url": "https://git.kernel.org/stable/c/67bb7521b6420d81dab7538c0686f18f7d6d09f4"
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},
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{
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"url": "https://git.kernel.org/stable/c/4c1cdec319b9aadb65737c3eb1f5cb74bd6aa156"
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}
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],
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"title": "x86/MCE/AMD: Use an u64 for bank_map",
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"x_generator": {
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"engine": "bippy-1.2.0"
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}
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},
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"adp": [
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{
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"metrics": [
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{
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"other": {
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"type": "ssvc",
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"content": {
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"id": "CVE-2023-53474",
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"role": "CISA Coordinator",
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"options": [
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{
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"Exploitation": "none"
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},
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{
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"Automatable": "no"
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},
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{
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"Technical Impact": "total"
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}
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],
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"version": "2.0.3",
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"timestamp": "2026-10-15T21:34:40.536216Z"
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}
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}
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}
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],
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"title": "CISA ADP Vulnrichment",
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"providerMetadata": {
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"orgId": "134c704f-9b21-4f2e-91b3-4a467353bcc0",
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"shortName": "CISA-ADP",
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"dateUpdated": "2026-10-15T21:41:28.463Z"
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}
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}
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]
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}
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} |